- Hierarchical defect-oriented fault simulation for digital circuits
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Hierarchical defect-oriented fault simulation for digital circuits

  1. digitálny obvod. defekty. porucha. generovanie testovBlyzniuk, M Hierarchical defect-oriented fault simulation for digital circuits. Cibáková, T.. Gramatová, Elena, 1948-. Kuzmicz, W.. Lobur, M.. Pleskacz, W.A.. Raik, J.. Ubar, Raimund In: Los Alamitos : IEEE Computer Society, 2000. -- IEEE European Test Workshop 2000 : proceedings. 23-26 May 2000, Cascais, Portugal. -- s.69-74. -- 0-7695-0701-8.
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