- Histogram memory reduction in FPGA gradient edge detectors
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Histogram memory reduction in FPGA gradient edge detectors

  1. Histogram memory reduction in FPGA gradient edge detectors / aut. Miroslav Hagara, Oldřich Ondráček, Viera Stopjaková, Radovan Stojanović
    Hagara Miroslav ; 033000  Ondráček Oldřich ; 033000 Stopjaková Viera ; 033000 Stojanović Radovan
    MECO 2022 : . S. 375-378
    edge detection histogram thresholding FPGA
    https://ieeexplore.ieee.org/document/9797154
    článok zo zborníka
    AFC - Reports at international scientific conferences
    V2 - Vedecký výstup publikačnej činnosti ako časť editovanej knihy alebo zborníka
    article

    article

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