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  1. Digital Filter Synthesis Considering Multiple Adder Graphs for a Coefficient
    Han J.H.  Park I.C.
    2008 IEEE International Conference on Computer Design . s.315-320
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  2. Digital filter synthesis based on an algorithm to generate all minimal signed digit representations
    Park I.C.  Kang H.J.
    IEEE Transactions on Computer-Aided Design on Integrated Circuits and Systems . Vol. 21 (2002), s.1525-1529, Iss.12
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  3. FIR filter synthesis algorithms for minimizing the delay and the number of adders
    Kang H.J.  Park I.C.
    IEEE Transactions on Circuits and Systems II-Analog and Digital Signal Processing . Vol. 48 (2001), s.770-777, Iss.8
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