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  1. Some results in automatic functional test design for processors
    Hudec Ján ; I100 
    Lecture Notes in Electrical Engineering : . Vol. 151 Emerging Trends in Computing, Informatics, Systems Sciences, and Engineering (2013), s. 965-972
    generovanie testov simulácia a verifikácia testov funkčný test procesora
    článok zo zborníka
    AFC - Reports at international scientific conferences
    article

    article

  2. Defects, faults, fault models
    Gramatová Elena ; I100  Ubar Raimund Pleskacz Witold Fischerová Mária
    Handbook of Testing electronic Systems / . s.26-96
    elektronický obvod defekty porucha generovanie testov testovateľnosť
    kapitola(článok) z dokumentu
    ACC - Chapters in academic school-books issued in foreign editorship
    article

    article

  3. Internet-based collaborative test generation with MOSCITO
    Schneider A.  Ivask E. Mikloš Peter Raik J. Diener K.-H Ubar R. Cibáková T. Gramatová Elena ; 070400
    DATE'02 : . s.221-226
    digitálny obvod generovanie testov internetové technológie
    článok zo zborníka
    AFC - Reports at international scientific conferences
    article

    article

  4. Hierarchical test generation for combinational circuits with real defects coverage
    Cibáková T.  Fischerová M. Gramatová Elena ; 070400 Kuzmicz W. Pleskacz W.A. Raik J. Ubar Raimund
    Microelectronics Reliability . Vol. 42, Iss. 7 (2002), s.1141-1149
    defekty digitálny obvod generovanie testov
    článok z periodika
    ADC - Scientific titles in foreign carented magazines and noticed year-books
    article

    article

  5. Hierarchical defect-oriented fault simulation for digital circuits
    Blyzniuk M.  Cibáková T. Gramatová Elena ; I100 Kuzmicz W. Lobur M. Pleskacz W.A. Raik J. Ubar Raimund
    IEEE European Test Workshop 2000 : . s.69-74
    digitálny obvod defekty porucha generovanie testov
    článok zo zborníka
    AFC - Reports at international scientific conferences
    article

    article