- Logical circuits design education based on virtual verification panel
Počet záznamov: 1  

Logical circuits design education based on virtual verification panel

  1. PIŠTEK, Peter et al. Logical circuits design education based on virtual verification panel. In Lecture Notes in Electrical Engineering : proceedings of the International joint conferences on computer, information, and systems Sciences, and engineering (CISSE 2010), December 03-06, 2010, Bridgeport, USA. s.903-914. ISSN 1876-1100 (2013). I*75/13
Počet záznamov: 1  

  Tieto stránky využívajú súbory cookies, ktoré uľahčujú ich prezeranie. Ďalšie informácie o tom ako používame cookies.